American Standard Circuits is an early adopter of Averatek’s A-SAP process for its ultra-high definition interconnect (UHDI) products. I sat down with industry veteran John Johnson to discuss this. John, vice president of business development, oversees quality at American Standard Circuits, and previously worked at Averatek. In the spirit of full disclosure, we will be discussing and sharing photos, slides, and materials with permission from both ASC and Averatek. This is the first of a three-part interview. 

Steve Williams: Welcome John, good to see you again. 

John Johnson: Thank you, Steve. It’s my pleasure. I’m always looking to talk about UHDI and the A-SAP process.

Williams: What does A-SAP stand for? What does it mean?

Johnson: The A in A-SAP stands for Averatek, and of course, SAP is a semi-additive process. So it's an Averatek semi-additive process they've developed for the electronics industry, predominantly circuit boards.

Williams: Very good. You've had a lot of leadership positions in the industry, but before American Standard, you worked at Averatek?

Johnson: I was the vice president of sales and customer support, and, predominantly, my role was working with the licensees to get them up and running, to bring product realization to the forefront with them.

The fully additive process is a pretty old process, and I remember back when they were making print and etch boards with 15-mil line width and space. What’s the difference between additive and semi-additive?

Semi-additive is similar, but it’s not. With that old additive process, those processes would run in plating for 24 hours or more to get the right plating thickness, but in this process, we are putting down a very thin layer of electrolytic copper as a base metal, rather than using an ultra-thin foil or something like that. Once that’s defined, then we go down with a photoresist and image trace patterns, which are actually trenches in the resist. Then we plate those up and strip away the resist, and there we go. We’ll just flash-etch the base electrolytic copper so it’s not touching the circuit walls at all. It really looks like an additive-type trace, but it’s plated up inside that trench. You then get perfectly straight sidewalls and a lot of benefits toward signal integrity.

Talk a little bit about chemistries and what kind of applications this process typically is made for?

This process works well for anyone trying to define a very thin-lined trace, and it works for ultra-high density circuit boards. In fact, that’s what we call our program: ultra-high density interconnection. If you look at any high-performance HDI circuit boards, they can benefit from this technology where you have something sub-75-micron trace and space—the old 3-mil lines and spaces. If you have a 2-mil and, let’s say, via-in-pad plated over with multiple plating steps, this technology can help; it’s a pretty broad range for packaged substrates and interposers. There are many buzzwords floating around in the U.S. because they’re bringing this technology back here to support the supply to critical industries like defense and aerospace. This allows us to not be so dependent on the Far East. But it requires traces that are sub-25 microns (sub-1 mil), so this chemistry works well for that as well as passives like inductors and capacitors inside the boards. The technology for embedded capacitors and resistors is not new, but certainly, this can be done in a different way where you’re building traces that are very tall and narrow, meaning that your aspect and spacing ratios are tight. For antennas and waveguides, there are many aspects that Averatek has worked on to grow this into different passives. For the future, they’re looking at ways to embed chips, so it’s pretty exciting.

That is exciting stuff. I remember when 3-mil line and space was the state-of-the-art, or even the bleeding edge if you go back far enough.

It’s nice to see this type of technology come around because it certainly gives us a chance to leapfrog over where Asia is today.

Tell me about some of the advantages of this technology.

When you look at the circuit board today, we’re locked in at 3-and-3; some folks can do 2-and-2 in lines and spaces, but that might be by accident. If you can get down to 25-micron (1-mil) lines and spaces, you can reduce the size of the circuit board. Already the chips have gone smaller and smaller in terms of pitch. Half-millimeter BGAs are fairly common and we keep hearing it will go down to 0.35 mil, 0.3 mil, and who knows from there. Well, you can’t route that out of a pattern very easily with even a 2-mil line and space. You have to get down to the 1-mil line and space. That helps, but when you’re doing that, you’re reducing layer counts and the number of microvias in a structure, which can improve reliability. You don’t need as many stacked microvias. When I was at Averatek, we looked at situations of reconfiguring 12-layer boards with many sub-assemblies down as far as a two-layer board. It’s quite amazing when getting to the ultra-fine lines and spaces.