Article DFM 101: PCB Controlled Impedance

Written by: Anaya Vardya on August 4, 2021

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Introduction

One of the most significant challenges PCB designers face is the lack of awareness about the cost drivers in the PCB manufacturing process. This article, part of an ongoing series, will explore these cost drivers from the PCB manufacturer’s perspective and how design decisions can influence product reliability.

DFM

Design for Manufacturing (DFM) involves designing printed circuit boards (PCBs) that align with both the customer's assembly manufacturing capabilities and the board fabrication processes to minimize costs. Although direct engagement with PCB fabricators early in the design process is ideal, this series offers guidelines that aim to "design for success."

Controlled Impedance

PCBs that include controlled impedance lines necessitate specific constructions and stricter manufacturing controls to meet precise impedance requirements. The fabrication drawing should outline the nominal impedance, tolerance, and line width needed, allowing the fabricator to develop a tailored construction to fulfill these specifications. Leading fabricators employ impedance modeling software to devise the most cost-effective material construction for controlled impedance PCBs.

Primary Impedance Factors

  • Trace width
  • Copper thickness
  • Dielectric spacing (noted as “Reference Only” in Impedance Requirements)
  • Overall PCB thickness
  • Material requirements

Multiple Impedance Considerations

It's crucial for PCBs requiring multiple impedance values on the same signal layers that the fabricator can produce impedance coupons reflecting each specific model. However, since testing multiple impedance values on a layer results in wider coupons, which consume valuable panel space, it's advisable to specify only one target impedance value per layer when possible.

Two types of impedance classifications are generally specified: single-ended and differential.

Single-Ended Impedance

Single-ended impedance involves a single trace interacting with its reference plane(s). The main types include:

  • Microstrip: A trace on an outer layer with a single reference plane below it.
  • Embedded microstrip: A microstrip line covered by a dielectric; becomes embedded when a solder mask is applied.
  • Stripline: Located on an internal layer, sandwiched between reference planes above and below.
  • Dual stripline or offset stripline: Used when two signal layers routed orthogonally have external reference planes.

Differential Impedance

Differential impedance involves two traces interacting with their reference plane(s). Key configurations include:

  • Edge coupled microstrip: Two adjacent traces on an outer layer with a reference plane below.
  • Edge coupled embedded microstrip: Similar to the above but covered by a dielectric; solder mask converts it to embedded.
  • Edge coupled stripline: Two adjacent traces on an internal layer, centered between reference planes.
  • Edge coupled dual stripline or offset stripline: Typically used when adjacent signal layers are orthogonally routed.
  • Broadside coupled stripline: Differential lines on adjacent layers directly above each other, centered between reference planes.

Controlled Impedance Design Guidelines

  • Standard impedance tolerance: ±10%
  • Tighter tolerances are possible but require careful handling.
  • Broadside-coupled striplines should ideally be implemented on a core to ensure Z-axis alignment between signal layers.
  • Design trace-to-trace spacing for accurate modeling.
  • Impedance lines should have slightly different apertures than non-impedance traces to facilitate line width adjustments.
  • Define reference planes clearly.

Minimizing Impedance Costs

Effective cost reduction strategies include:

  • Specify impedance only where necessary.
  • Route all controlled impedance traces on the same layer.
  • Maintain a ±10% tolerance when feasible.
  • Limit testing to one target impedance value per layer.
  • Place power/ground layers adjacent to each other to optimize construction.

Conformance Tests

  • 100% Testing: All impedance coupons undergo comprehensive testing and the results are electronically documented.
  • Serialization: A traceability method where each PCB and its corresponding coupon are marked with a serial number before impedance testing.

Understanding cost drivers and fostering early collaboration between designers and fabricators is key to achieving cost-effective PCB designs. Adhering to your fabricator's DFM guidelines is an essential first step.


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